lab2

ECES 301: Laboratory # 2; Due Sept. 22, 2000
Objective

The objective of this laboratory is to learn about different types of latches and flip-flops, to study their setup and hold times, and to understand the concept of metastability.

Introduction

Latches and flip-flops are examples of sequential logic circuits. Unlike combinational logic circuits, which depend only on the current state of the inputs, sequential circuits also depend on the past sequence of inputs to determine the outputs. A real-world example of this would be a washing machine, which would only execute the spin cycle after the wash and rinse cycle were completed. Each washing machine cycle would be an example of a current state of the process, from which future behavior could be predicted.

Figure 1. A pair of inverters forming a bistable element

The simplest sequential circuit is made up of a pair of inverters, with the output of each one tied to the input of the other. This forms a circuit with two stable states, with either the first inverter showing a high input and the second giving a high output, or vice-versa. The output of each of the inverters feeds the input of the other one, so this bistable circuit should move to one state or the other and stay there permanently on power-up.

Analog analysis of the double-inverter circuit described above shows not two, but three crossover points when the transfer functions are plotted. The third point, located halfway between the two stable states described in the previous paragraph, is known as the metastable point. Theoretically, this point could be achieved, and held indefinitely, but normally random noise would move the circuit into one of the two stable states eventually.

Given that the metastable state exists in a simple circuit, it also exists in more complex sequential circuits, and may occur at any time during the operation of the circuit. For example, if a pulse of just under the minimum time duration (width) is applied to a set-reset (S-R) flip-flop, the circuit may be pushed into the metastable state, where it will remain for a time.

Flip-flops, in general, refer to a sequential device that samples its inputs and only changes its outputs at times determined by a clock signal. Latches are also sequential devices which sample their inputs, but change output states without regard to any clocking signal. There are several varieties of latches and flip-flops with different characteristics.

Figure 2. S-R latch built from NOR gates and the preferred S/R latch symbol.

S-R (set-reset) latches are simple bistable elements that can be created from two NOR gates. With Set and Reset inputs, and Q and /Q outputs, the latch can be set or reset by applying a logic level of 1 on the appropriate input pin. The previous state is retained in the S-R latch when the input values are returned to 0. /S-/R latches may be made from NAND gates, and reverse the truth table of the S-R latch, with the inputs resting at logic level 1 to retain the previous output state. The S-R latch can be modified easily to add an enabling input signal, which causes the latch to react to changes in the input only when the enable signal is held at logic level 1. The resulting circuit is known as an S-R latch with enable. One problem with the S-R and /S-/R latches is that simultaneous inputs of 1 on the S-R or 0 on the /S-/R can cause the latch to enter a metastable state.

Adding an inverter between the S and R lines of an S-R latch with enable eliminates the possibility of simultaneous inputs causing metastable output, and the resulting D latch requires only one input to control the S-R lines. Along with the enable input, each D latch can be used to either pass a bit through when the enable input is asserted, or to hold or store a bit when the enable bit is negated.

The signal has to pass through multiple internal gates, and the total time the signal takes to move from input, through the gates, to the output is the propagation delay. This delay time must be considered when using a D latch within a high-speed environment, as this creates a time when the D input must not change, which may be violated by a too-fast clock signal. This time period consists of the setup time before and the hold time after the falling enable pulse stores the bit in the latch. If the D input line changes within this time period, the latch output may become metastable.

Two latches can be combined, with the output of one controlling the behavior of the other, along with inverters on the clock signal to create a D flip-flop. This circuit samples the D input signal, similar to a single D latch, but only changes state when the clock input signal goes from 0 to 1 (positive-edge triggered) or 1 to 0 (negative-edge triggered). Preset and clear signals can be added as asynchronous inputs to force the flip-flop to a particular state separately from the clock and D inputs.

Replacing the D latches in the D flip-flop with S-R latches creates a master/slave S-R flip-flop. This circuit may be unpredictable if both S and R inputs are brought high on the falling edge of the clock pulse. This problem is removed by placing additional gates in front of the S-R latches that allow input to pass only when the output state is correct. Both the master/slave S-R and master/slave J-K flip flops just described are sensitive to changes in inputs during the entire time during the prior clock pulse, not just the rising or falling edge, as with the D flip-flop. Additionally, J-K flip-flops can be made to be edge-triggered, and either D or J-K flip-flops can be rewired to create a T (toggle) flip-flop, which changes state on every clock tick, dividing the input pulse width in half.

Latches and flip-flops have applications as buffers and storage units, as well as in counters and frequency divider circuits. They can be used to hold address and data information within larger circuits, and are useful in the construction of electronics based on clocked synchronous state machine designs. One common application for a simple bistable latch is to debounce, or eliminate the numerous, closely located pulses that often occur when a switch is depressed. Pairing two inverters and tying the output of each to the input of the other, while placing the switch on the input side of the circuit causes any multiple pulses that come in a 10-20 ms period to be condensed into one output pulse only for each time the switch is thrown. A flip-flop can also be made into a monostable multivibrator by the addition of a resistor and a capacitor. A short pulse applied to the input causes the flip-flop to move to an unstable state for a period of time determined by the RC time constant and then return to the original stable state. The width of the output pulse is therefore independent of the input frequency. The circuit produces a clean pulse of a known duration from variable input. A monostable multivibrator circuit is commonly referred to as a 'one-shot'.

An oscillator can be created from two monostable multivibrators by tying the input of each to the output of the other. In this way, each triggers the other, and an continuous output square wave is produced. Timing of the output wave of this astable multivibrator is dependent on the values of the resistors and capacitors associated with the chips. A flip-flop is at the center of the 555 single-chip oscillator, which produces a continuous square wave timing signal, and it only requires one resistor and one capacitor to control its output frequency. For dynamic gates and registers, multiphase clock pulses are needed. It is not difficult to create these pulses by dividing the input oscillator frequency in half using the toggle input on a J-K flip-flop, then passing the Q and /Q outputs to be ANDed with the original oscillator frequency. This produces two clock pulses, each at half the frequency of the original oscillator, but each exactly halfway out of phase with the other signal. A four-phase clock-pulse generator can be created by dividing the input oscillator frequency in half using the toggle input on a J-K flip-flop, similar to the two phase generator, then using the Q and /Q outputs of the J-K flip-flop for two of the phases, and these same two signals each fed through a monostable multivibrator to create the other two phased pulses.

Prelab:

1. Describe three ways that a latch or flip-flop may become metastable.

2. The truth tables for a J-K flip-flop and a T flip-flop are as follows:

    J   K   Q(t+1) Operation                       T        Q(t+1)      Operation
   ------------------------------                 ---------------------------------
    0   0     Q(t)     No change                      0          Q(t)         No change
    0   1       0       Reset                               1         /Q(t)         Complement
    1   0       1         Set
    1   1     /Q(t)    Complement

From the tables above, what change needs to be made to the J-K flip-flop to convert it to a T flip-flop?

3. As you notice from question 2, a J-K flip-flop can be substituted for many other types of simpler flip-flop circuits. In fact, given a limited number of bins, an engineer might choose to keep only J-K flip-flops in preference to other types because of that chip's versatility when constructing test-bench projects. Since the J-K can be made to mimic other types of flip-flops, speculate on three reasons why designers don't just use J-K flip-flops to replace all other types of simpler flip-flop circuits, such as the T type above, that can be created from the J-K circuit.

4. A 7474 circuit is a package containing two D-type positive-edge triggered flip-flops. Find a 7474 or 74LS74, and look up its timing parameters for hold time and setup time. Draw the three timing waveforms that would be present on CLK, D and output Q for 5-10 cycles of a 1 MHz clock, and 3-5 negative-to-positive transitions on the D input, none of which violate the hold or setup time of the circuit. Be sure to indicate the zones where hold and setup time are important by shading the areas, labeling them, and making them of an appropriate width based on the data you obtained for the 7474 or 74LS74 circuit.

5. Repeat the timing diagram of step 4, but this time indicate one or more violations of the hold time, and one or more violations of the setup time on your diagram.

Experiment:

1. Obtain a 7474 or 74LS74 chip from the electronics room, along with 2 LEDs and 2 270-Ohm resistors. Wire the 7474 with pins 14 (VCC), 1 (Clear), and 4 (Preset) to +5 volts, and pin 7 to ground. Connect pin 1 of the touchtone keypad (closest to the * key) to pin 2 of the 7474, pin 5 of the touchtone keypad to +5V and pin 7 of the keypad to ground. Wire the positive side of one LED to pin 5 of the 7474, and the positive side of the other LED to pin 6 of the 7474. Connect the negative side of each LED through a 270-Ohm resistor to ground. Provide a square-wave input of about 5Vpp at 1 Megahertz to pin 3 of the 7474. Turn the circuit on. One of the two lights should come on if the circuit is working correctly. If the light on pin 5 comes on, you should be able to press the * key on the touchtone keypad and light up the other LED. If the light on pin 6 comes on, you should be able to press the # key on the touchtone pad in order to light up the other LED.

NOTE: DO NOT PRESS BOTH * AND # AT THE SAME TIME WHILE POWER IS ON OR YOU WILL SHORT OUT THE POWER SUPPLY AND/OR BURN UP THE BREADBOARD OR KEYPAD!

Try disconnecting the power from the circuit by temporarily pulling the wire connected between +5V and pin 14 of the 7474. Plug the wire back in carefully and watch which light comes on. Try this a number of times if necessary until the circuit comes on at least once with the pin 5 LED on and once with the pin 6 LED on. Note that you must press a different key in each of the two states to change the LED, while the other key does nothing. Why does the D flip-flop power up in one of two different states rather than consistently coming up in a predictable state? Why does the * key work to change the LED in one state while the # key works in the other?

2. Once you have determined which button (* or # BUT NOT BOTH!) changes the LED for the current state of your circuit, try to "beat the clock" by depressing the key rapidly and letting it go without activating the other light at all. This should be virtually impossible in the 1 MHz frequency range. Now reduce the frequency until you are able to press the key without any LED activity. At about what frequency are you able to consistently "beat the clock"? Draw the waveform of this frequency, and show where your keypresses are occuring in relation to the clock waveform by drawing them on a separate line below the clock's square wave output. Explain why you were able to avoid activating the 7474 circuit at low frequencies.

3. Now reverse the leads going into pins 2 and 3 of the 7474. That is, take the wire from the clock source and plug it in to pin 2, and take the wire from the keypad and plug it in to pin 3. Set the waveform generator to a frequency of 1 Hz. Press the # key and hold it for a random length of time, short or long, and release it. What happened? Try this for at least 50 times and total your findings by one of four categories. A) Nothing happened, B) The LED that was on went off, and the other LED came on, C) The LED that was off came on momentarily, but went off again, and the LED that was on before the keypress came back on, D) Both LEDs came on. Can you explain these results?

4. With the power off to the circuit, wire pin 8 to pin 12 of the 7474, pin 9 to pin 3, and connect the clock signal to both pins 2 and 3 of the 7474. Turn the clock frequency up to something above 1 KHz and power up the circuit. Which LED is on? Remove power from the circuit and move the clock input that was on pin 3 to pin 11, leaving the other clock signal on pin 2. Now turn the circuit on and tell which LED is on. What is the reason for these results? To obtain a clue, turn the circuit off, remove the LED from pin 5, remove the clock signal from pin 2, and connect that clock signal directly to the positive side of the LED. Then remove the LED from pin 6 and connect it to pin 9 instead. Set the waveform generator frequency to 1 Hz, turn the power on, and watch the lights.